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H8/3028F Datasheet(PDF) 838 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 838 Page - Renesas Technology Corp |
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838 / 923 page  Rev. 2.00, 09/03, page 808 of 890 TCSR—Timer Control/Status Register H'FFF8C WDT Bit Initial value Read/Write 0 R/(W) * 7 OVF 0 R/W 6 WT/ IT 0 R/W 5 TME 4 — 1 — 1 — 3 — 0 R/W 2 CKS2 0 R/W 1 CKS1 Clock select 2 to 0 0 0 φ/2 φ/32 φ/64 φ/128 φ/256 φ/512 φ/2048 φ/4096 1 0 CKS0 0 R/W 0 1 0 1 0 1 0 1 1 0 1 Note: * Only 0 can be written, to clear the flag. CKS2 CKS1 CKS0 Description Timer enable 0 1 Timer disabled • TCNT is initialized to H'00 and halted Timer enabled • TCNT is counting Timer mode select 0 1 Interval timer: requests interval timer interrupts Watchdog timer: generates a reset signal Overflow flag 0 1 [Clearing condition] Read OVF when OVF = 1, then write 0 in OVF [Setting condition] TCNT changes from H'FF to H'00 |
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