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H8/3028F Datasheet(PDF) 839 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 839 Page - Renesas Technology Corp |
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839 / 923 page ![]() Rev. 2.00, 09/03, page 809 of 890 TCNT—Timer Counter H'FFF8D (read), WDT H'FFF8C (write) Bit Initial value Read/Write 0 R/W 7 0 R/W 6 0 R/W 5 0 R/W 4 0 R/W 3 0 R/W 2 0 R/W 1 0 R/W 0 Count value RSTCSR—Reset Control/Status Register H'FFF8F (read), WDT H'FFF8E (write) Bit Initial value Read/Write 0 R/(W) * 7 WRST 0 R/W 6 RSTOE 1 — 5 — 1 — 4 — 1 — 3 — 1 — 2 — 1 — 1 — 1 — 0 — Reset output enable 0 External output of reset signal is disabled External output of reset signal is enabled 1 Watchdog timer reset 0 [Clearing conditions] Reset signal at RES pin Read WRST when WRST = 1, then write 0 in WRST 1 [Setting condition] TCNT overflow generates a reset signal Note: * Only 0 can be written in bit 7, to clear the flag. |
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