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H8/3028F Datasheet(PDF) 181 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 181 Page - Renesas Technology Corp |
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181 / 923 page  Rev. 2.00, 09/03, page 151 of 890 Table 6.5 Settings of Bits DRAS2 to DRAS0 and Corresponding DRAM Space ( RAS RAS RAS RAS Output Pin) DRAS2 DRAS1 DRAS0 Area 5 Area 4 Area 3 Area 2 0 0 0 Normal space Normal space Normal space Normal space 1 Normal space Normal space Normal space DRAM space ( CS2) 1 0 Normal space Normal space DRAM space ( CS3) DRAM space ( CS2) 1 Normal space Normal space DRAM space ( CS2)* DRAM space ( CS2)* 10 0Normal space DRAM space ( CS4) DRAM space ( CS3) DRAM space ( CS2) 1 DRAM space ( CS5) DRAM space ( CS4) DRAM space ( CS3) DRAM space ( CS2) 1 0 DRAM space ( CS4)* DRAM space ( CS4)* DRAM space ( CS2)* DRAM space ( CS2)* 1 DRAM space ( CS2)* DRAM space ( CS2)* DRAM space ( CS2)* DRAM space ( CS2)* Note: * A single CSn pin serves as a common RAS output pin for a number of areas. Unused CSn pins can be used as input/output ports. |
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