H8SLASH3002 datasheet(125/700 Pages) RENESAS

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6.2.5 Bus Release Control Register (BRCR)

BRCR is an 8-bit readable/writable register that enables address output on bus lines A23 to A21

and enables or disables release of the bus to an external device.

BRCR is initialized to H'FE by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bit 7—Address 23 Enable (A23E): Enables PA4 to be used as the A23 address output pin.

Writing 0 in this bit enables A23 address output from PA4. In modes other than 3 and 4 this bit

cannot be modified and PA4 has its ordinary input/output functions.

Bit 7

A23E

Description

0PA4 is the A23 address output pin

1PA4 is the PA4/TP4/TIOCA1 input/output pin

(Initial value)

Bit

Initial value

A23E

—

R/W

A22E

—

R/W

A21E

—

R/W

—

BRLE

R/W

—

Bus release enable

Enables or disables

release of the bus

to an external device

Address 23 to 21 enable

Reserved bits

These bits enable PA to

PA to be used for A

address output

423

Modes 1, 2

Modes 3, 4

Read/

Write

110

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