H8SLASH3002 datasheet(301/700 Pages) RENESAS

301 / 700 page

Table 10-3 ITU Registers (cont)

Abbre-

Initial

Channel

Address*1

Name

viation

R/W

Value

H'FF78

Timer control register 2

TCR2

R/W

H'80

H'FF79

Timer I/O control register 2

TIOR2

R/W

H'88

H'FF7A

Timer interrupt enable register 2

TIER2

R/W

H'F8

H'FF7B

Timer status register 2

TSR2

R/(W)*2

H'F8

H'FF7C

Timer counter 2 (high)

TCNT2H

R/W

H'00

H'FF7D

Timer counter 2 (low)

TCNT2L

R/W

H'00

H'FF7E

General register A2 (high)

GRA2H

R/W

H'FF

H'FF7F

General register A2 (low)

GRA2L

R/W

H'FF

H'FF80

General register B2 (high)

GRB2H

R/W

H'FF

H'FF81

General register B2 (low)

GRB2L

R/W

H'FF

H'FF82

Timer control register 3

TCR3

R/W

H'80

H'FF83

Timer I/O control register 3

TIOR3

R/W

H'88

H'FF84

Timer interrupt enable register 3

TIER3

R/W

H'F8

H'FF85

Timer status register 3

TSR3

R/(W)*2

H'F8

H'FF86

Timer counter 3 (high)

TCNT3H

R/W

H'00

H'FF87

Timer counter 3 (low)

TCNT3L

R/W

H'00

H'FF88

General register A3 (high)

GRA3H

R/W

H'FF

H'FF89

General register A3 (low)

GRA3L

R/W

H'FF

H'FF8A

General register B3 (high)

GRB3H

R/W

H'FF

H'FF8B

General register B3 (low)

GRB3L

R/W

H'FF

H'FF8C

Buffer register A3 (high)

BRA3H

R/W

H'FF

H'FF8D

Buffer register A3 (low)

BRA3L

R/W

H'FF

H'FF8E

Buffer register B3 (high)

BRB3H

R/W

H'FF

H'FF8F

Buffer register B3 (low)

BRB3L

R/W

H'FF

Notes: 1. The lower 16 bits of the address are indicated.

2. Only 0 can be written, to clear flags.

287

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