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AT89C51AC3-RDTIM Datasheet(PDF) 117 Page - ATMEL Corporation |
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AT89C51AC3-RDTIM Datasheet(HTML) 117 Page - ATMEL Corporation |
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117 / 140 page  117 AT89C51AC3 4383D–8051–02/08 Table 67. IPL0 Register IPL0 (S:B8h) Interrupt Enable Register Reset Value = X000 0000b bit addressable 7 6 5 4 3 2 1 0 - PPC PT2 PS PT1 PX1 PT0 PX0 Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPC PCA Interrupt Priority bit Refer to PPCH for priority level 5 PT2 Timer 2 Overflow Interrupt Priority bit Refer to PT2H for priority level. 4 PS Serial Port Priority bit Refer to PSH for priority level. 3 PT1 Timer 1 Overflow Interrupt Priority bit Refer to PT1H for priority level. 2 PX1 External Interrupt 1 Priority bit Refer to PX1H for priority level. 1 PT0 Timer 0 Overflow Interrupt Priority bit Refer to PT0H for priority level. 0 PX0 External Interrupt 0 Priority bit Refer to PX0H for priority level. |
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