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COREPCI-AR Datasheet(PDF) 21 Page - Actel Corporation |
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COREPCI-AR Datasheet(HTML) 21 Page - Actel Corporation |
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21 / 42 page  CorePCI v5.41 v4.0 21 ENABLE_BAR_OVERFLOW Binary When ENABLE_BAR_OVERFLOW is set the core will force a disconnect at the address boundary. When false the core will wrap around internally, This violates the PCI specification. When '1', the core will be slightly bigger and may cause disconnects when the last four memory locations are accessed. To avoid the extra logic and disconnects this generic may be set to '0'. EXPORT_CLOCK_OUT Binary When EXPORT_CLOCK_OUT is set the core will provide a CLK_OUT port that contains the internal buffered PCI clock. This should be used for clocking other circuitry within the FPGA. Table 22 • CorePCI Customization Constants (Continued) Constant Type Description Notes: 1. Not applicable in Target-only core. 2. Only applicable in Target+DMA core. 3. Not applicable in Master-only core. |
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