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OMAP3530-HiRel Datasheet(PDF) 40 Page - Texas Instruments

Part # OMAP3530-HiRel
Description  OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
PDF  239 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530-HiRel Datasheet(HTML) 40 Page - Texas Instruments

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OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
SPRS599 – JUNE 2009
www.ti.com
Table 2-2. Ball Characteristics (CBC Pkg.) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER
HYS
BUFFER
PULLUP
IO
BOTTOM
TOP
NAME
[5]
[6]
RESET
RESET
REL.
[10]
[11]
STRENG
/DOWN
CELL
[1]
[2]
[4]
STATE
REL.
MODE
TH
TYPE
[14]
[7]
STATE
[9]
(mA)
[13]
[8]
[12]
W10
-
mmc2_clk
0
O
L
L
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mcspi3_clk
1
IO
gpio_130
4
IO
safe_mode
7
-
R10
-
mmc2_cmd
0
IO
H
H
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mcspi3_simo
1
IO
gpio_131
4
IO
safe_mode
7
-
T10
-
mmc2_dat0
0
IO
H
H
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mcspi3_somi
1
IO
gpio_132
4
IO
safe_mode
7
-
T9
-
mmc2_dat1
0
IO
H
H
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
gpio_133
4
IO
safe_mode
7
-
U10
-
mmc2_dat2
0
IO
H
H
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mcspi3_cs1
1
O
gpio_134
4
IO
safe_mode
7
-
U9
-
mmc2_dat3
0
IO
H
H
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mcspi3_cs0
1
IO
gpio_135
4
IO
safe_mode
7
-
V10
-
mmc2_dat4
0
IO
L
L
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mmc2_dir_dat0
1
O
mmc3_dat0
3
IO
gpio_136
4
IO
safe_mode
7
-
R2
-
uart1_rts
0
O
L
L
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
-
1
O
gpio_149
4
IO
safe_mode
7
-
H3
-
uart1_rx
0
I
L
L
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
mcbsp1_clkr
2
IO
mcspi4_clk
3
IO
gpio_151
4
IO
safe_mode
7
-
L4
-
uart1_tx
0
O
L
L
7
vdds_io
Yes
4
(2)
PU100/
LVCMOS
PD100
-
1
O
gpio_148
4
IO
safe_mode
7
-
Y24
-
uart2_cts
0
I
H
H
7
vdds_io
Yes
4
PU100/
LVCMOS
PD100
mcbsp3_dx
1
IO
gpt9_pwm_evt
2
IO
gpio_144
4
IO
safe_mode
7
-
AA24
-
uart2_rts
0
O
H
H
7
vdds_io
Yes
4
PU100/
LVCMOS
PD100
mcbsp3_dr
1
I
gpt10_pwm_evt
2
IO
gpio_145
4
IO
safe_mode
7
-
AD21
-
uart2_rx
0
I
H
H
7
vdds_io
Yes
4
PU100/
LVCMOS
PD100
mcbsp3_fsx
1
IO
TERMINAL DESCRIPTION
40
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