P89LPC913 datasheet(28/66 Pages) NXP

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P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

28 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

8.2 Enhanced CPU

The P89LPC912/913/914 uses an enhanced 80C51 CPU which runs at six times the

speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and

most instructions execute in one or two machine cycles.

8.3 Clocks

8.3.1 Clock deﬁnitions

The P89LPC912/913/914 device has several internal clocks as deﬁned below:

OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock

sources (see Figure 10, 11, and 12) and can also be optionally divided to a slower

frequency (see Section 8.8 “CCLK modiﬁcation: DIVM register”).

Note: fosc is deﬁned as the OSCCLK frequency.

CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine

cycle, and most instructions are executed in one to two machine cycles (two or four CCLK

cycles).

RCCLK — The internal 7.373 MHz RC oscillator output.

PCLK — Clock for the various peripheral devices and is CCLK/2

8.3.2 CPU clock (OSCCLK)

The P89LPC912/913/914 provide user-selectable oscillator options in generating the CPU

clock. This allows optimization for a range of needs from high precision to lowest possible

cost. These options are conﬁgured when the ﬂash is programmed and include an on-chip

watchdog oscillator and an on-chip RC oscillator.

In addition, both the P89LPC912 and P89LPC913 provide an oscillator using an external

crystal or an external clock source. The crystal oscillator can be optimized for low,

medium, or high frequency crystals covering a range from 20 kHz to 12 MHz.

8.3.3 Low-speed oscillator option (P89LPC912, P89LPC913)

This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic

resonators are also supported in this conﬁguration.

8.3.4 Medium-speed oscillator option (P89LPC912, P89LPC913)

This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic

resonators are also supported in this conﬁguration.

8.3.5 High-speed oscillator option (P89LPC912, P89LPC913)

This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic

resonators are also supported in this conﬁguration. When using an oscillator frequency

above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit

is required to hold the device in reset at power-up until VDD has reached its

speciﬁed level. When system power is removed VDD will fall below the minimum

speciﬁed operating voltage. When using an oscillator frequency above 12 MHz, in

some applications, an external brownout detect circuit may be required to hold the

device in reset when VDD falls below the minimum speciﬁed operating voltage.

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