P89LPC913 datasheet(55/66 Pages) NXP

55 / 66 page

P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

55 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Table 15.

Dynamic characteristics (P89LPC912, P89LPC913)

VDD = 3.0 V to 3.6 V, unless otherwise speciﬁed.

Tamb = −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise speciﬁed.[1]

Symbol

Parameter

Conditions

Variable clock

fosc = 18 MHz

Unit

Min

Max

Min

Max

fosc(RC)

internal RC oscillator frequency

nominal

f = 7.3728 MHz

trimmed to

±1%

at Tamb =25 °C

7.189

7.557

7.189

7.557

MHz

fosc(WD)

internal watchdog oscillator

frequency

nominal

f = 400 kHz

320

520

320

520

kHz

Crystal oscillator

fosc

oscillator frequency

[2]

MHz

Tcy(clk)

clock cycle time

see Figure 25

fCLKLP

low-power select clock

frequency

MHz

Glitch ﬁlter

tgr

glitch rejection

P1.5/RST pin

any pin except

P1.5/RST

tsa

signal acceptance

P1.5/RST pin

125

any pin except

P1.5/RST

External clock

tCHCX

clock HIGH time

see Figure 25

Tcy(clk) − tCLCX

tCLCX

clock LOW time

see Figure 25

Tcy(clk) − tCHCX

tCLCH

clock rise time

see Figure 25

-5

tCHCL

clock fall time

see Figure 25

-5

SPI interface

fSPI

SPI operating frequency

3.0 MHz (slave)

CCLK

⁄6

MHz

4.5 MHz (master)

CCLK

⁄4

4.5

MHz

TSPICYC

SPI cycle time

see Figure 26,

27, 28, 29

slave

⁄CCLK

333

master

⁄CCLK

222

P89LPC913 Datasheet(PDF) 55 Page - NXP Semiconductors

P89LPC913 Datasheet(HTML) 55 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

Datasheet Download

Link URL