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P89LPC913 Datasheet(PDF) 65 Page - NXP Semiconductors

Part # P89LPC913
Description  8-bit microcontrollers with two-clock 80C51 core, 1 kB 3 V flash with 128-byte RAM
PDF  66 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

P89LPC913 Datasheet(HTML) 65 Page - NXP Semiconductors

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P89LPC912_913_914_5
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 28 September 2007
65 of 66
continued >>
NXP Semiconductors
P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
18. Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.1
Principal features . . . . . . . . . . . . . . . . . . . . . . . 1
2.2
Additional features . . . . . . . . . . . . . . . . . . . . . . 1
3
Product comparison . . . . . . . . . . . . . . . . . . . . . 3
4
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
4.1
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 7
7
Pinning information . . . . . . . . . . . . . . . . . . . . . . 9
7.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 10
8
Functional description . . . . . . . . . . . . . . . . . . 16
8.1
Special function registers . . . . . . . . . . . . . . . . 16
8.2
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . 28
8.3
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.3.1
Clock definitions . . . . . . . . . . . . . . . . . . . . . . . 28
8.3.2
CPU clock (OSCCLK). . . . . . . . . . . . . . . . . . . 28
8.3.3
Low-speed oscillator option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.3.4
Medium-speed oscillator option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.3.5
High-speed oscillator option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.3.6
Clock output (P89LPC912, P89LPC913) . . . . 29
8.4
On-chip RC oscillator option . . . . . . . . . . . . . . 29
8.5
Watchdog oscillator option . . . . . . . . . . . . . . . 29
8.6
External clock input option (P89LPC912,
P89LPC913) . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.7
CCLK wake-up delay . . . . . . . . . . . . . . . . . . . 31
8.8
CCLK modification: DIVM register . . . . . . . . . 31
8.9
Low power select . . . . . . . . . . . . . . . . . . . . . . 31
8.10
Memory organization . . . . . . . . . . . . . . . . . . . 31
8.11
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8.11.1
External interrupt inputs . . . . . . . . . . . . . . . . . 32
8.12
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.12.1
Port configurations . . . . . . . . . . . . . . . . . . . . . 34
8.12.2
Quasi-bidirectional output configuration . . . . . 34
8.12.3
Open-drain output configuration . . . . . . . . . . . 35
8.12.4
Input-only configuration . . . . . . . . . . . . . . . . . 35
8.12.5
Push-pull output configuration . . . . . . . . . . . . 35
8.12.6
Port 0 analog functions . . . . . . . . . . . . . . . . . . 35
8.12.7
Additional port features. . . . . . . . . . . . . . . . . . 36
8.13
Power monitoring functions. . . . . . . . . . . . . . . 36
8.13.1
Brownout detection . . . . . . . . . . . . . . . . . . . . . 36
8.13.2
Power-on detection . . . . . . . . . . . . . . . . . . . . . 36
8.14
Power reduction modes . . . . . . . . . . . . . . . . . 36
8.14.1
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.14.2
Power-down mode . . . . . . . . . . . . . . . . . . . . . 37
8.14.3
Total Power-down mode . . . . . . . . . . . . . . . . . 37
8.15
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.16
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . 38
8.16.1
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.16.2
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.16.3
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.16.4
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.16.5
Mode 6 (P89LPC912, P89LPC914) . . . . . . . . 39
8.16.6
Timer overflow toggle output (P89LPC912,
P89LPC914). . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.17
RTC/system timer. . . . . . . . . . . . . . . . . . . . . . 39
8.18
UART (P89LPC913, P89LPC914) . . . . . . . . . 39
8.18.1
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.18.2
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.18.3
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.18.4
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.18.5
Baud rate generator and selection . . . . . . . . . 40
8.18.6
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.18.7
Break detect . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.18.8
Double buffering . . . . . . . . . . . . . . . . . . . . . . . 41
8.18.9
Transmit interrupts with double
buffering enabled (modes 1, 2 and 3) . . . . . . 41
8.18.10
The 9th bit (bit 8) in double buffering
(modes 1, 2 and 3) . . . . . . . . . . . . . . . . . . . . . 41
8.19
Serial Peripheral Interface (SPI). . . . . . . . . . . 41
8.19.1
Typical SPI configurations . . . . . . . . . . . . . . . 43
8.20
Analog comparators . . . . . . . . . . . . . . . . . . . . 45
8.21
Internal reference voltage. . . . . . . . . . . . . . . . 45
8.22
Comparator interrupt . . . . . . . . . . . . . . . . . . . 45
8.23
Comparators and power reduction modes . . . 46
8.24
Keypad interrupt . . . . . . . . . . . . . . . . . . . . . . . 46
8.25
Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 47
8.26
Additional features . . . . . . . . . . . . . . . . . . . . . 48
8.26.1
Software reset . . . . . . . . . . . . . . . . . . . . . . . . 48
8.26.2
Dual data pointers . . . . . . . . . . . . . . . . . . . . . 48
8.27
Flash program memory . . . . . . . . . . . . . . . . . 48
8.27.1
General description . . . . . . . . . . . . . . . . . . . . 48
8.27.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
8.27.3
Flash organization . . . . . . . . . . . . . . . . . . . . . 48
8.27.4
Flash programming and erasing. . . . . . . . . . . 49
8.27.5
In-circuit programming . . . . . . . . . . . . . . . . . . 49
8.27.6
In-application programming (IAP-Lite) . . . . . . 49
8.27.7
Using flash as data storage . . . . . . . . . . . . . . 49
8.27.8
User configuration bytes. . . . . . . . . . . . . . . . . 49
8.27.9
User sector security bytes . . . . . . . . . . . . . . . 49



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