M68HC05 datasheet(28/128 Pages) FREESCALE

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Technical Data

MC68HC05J1A — Rev. 3.0

Memory

2.4 Input/Output (I/O) Section

The first 32 addresses of the memory space, $0001–$001F, are the I/O

section. These are the addresses of the I/O control registers, status

registers, and data registers. See Figure 2-2.

One I/O register shown in Figure 2-2 is located outside the 32-byte I/O

section: the computer operating properly (COP) register is mapped at

$07F0.

2.5 Random-Access Memory (RAM)

The 64 addresses from $00C0 to $00FF serve as both the user RAM and

the stack RAM. The CPU uses five stack RAM bytes to save all CPU

call, the CPU uses two bytes to store the return address. The stack

pointer decrements during pushes and increments during pulls.

NOTE:

Be careful when using nested subroutines or multiple interrupt levels.

The CPU may overwrite data in the RAM during a subroutine or during

the interrupt stacking operation.

2.6 Read-Only Memory (ROM)

The ROM is located in two areas of the memory map:

1. Addresses $0300–$07CF contain 1232 bytes of user ROM.

2. Addresses $07F8–$07FF contain 16 bytes of ROM reserved for

user vectors.

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M68HC05 Datasheet(PDF) 28 Page - Freescale Semiconductor, Inc