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MB90F474LPF Datasheet(PDF) 76 Page - fujitsu semiconductor |
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MB90F474LPF Datasheet(HTML) 76 Page - fujitsu semiconductor |
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76 / 118 page ![]() MB90470 Series 76 20. Interrupt Controller The interrupt control registers are located in the interrupt controller. An interrupt control register is provided for each I/O with an interrupt function. The registers have the following functions. • Set the interrupt level of the corresponding peripheral. (1) Register List Note : Do not access these registers using read-modify-write instructions as this can cause misoperation. (2) Block Diagram -- -- IL2 IL1 IL0 15 14 13 12 11 10 9 8 ICR00 ICR02 ICR04 ICR06 ICR08 ICR14 : 0000B0H : 0000B2H : 0000B4H : 0000B6H : 0000B8H : 0000BEH ICR01 ICR03 ICR05 ICR07 ICR09 ICR11 ICR13 ICR15 -- - - Re- served IL2 IL1 IL0 15 14 13 12 11 10 9 8 : 0000B1H : 0000B3H : 0000B5H : 0000B7H : 0000B9H : 0000BBH : 0000BDH : 0000BFH bit (W) (W) (W) (W) (R/W) (R/W) (R/W) (R/W) (0) (0) (0) (0) (0) (1) (1) (1) (W) (W) (W) (W) (R/W) (R/W) (R/W) (R/W) (0) (0) (0) (0) (0) (1) (1) (1) bit Re- served Interrupt control register Address: Read/Write → Initial value → ICR01, 03, 05, 07, 09, 11, 13, 15 Address: Read/Write → Initial value → ICR00, 02, 04, 26, 08, 10, 12, 14 Re- IL2 IL1 IL0 32 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 served Determine priority of interrupt Interrupt request (peripheral resource) (CPU) Interrupt level |
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