PSD4235G2V_09 datasheet(39/124 Pages) STMICROELECTRONICS

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PSD4235G2V

Programming Flash memory

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Programming Flash memory

Flash memory must be erased prior to being programmed. The MCU may erase Flash

memory all at once or by-sector. Although erasing Flash memory occurs on a sector or

device basis, programming Flash memory occurs on a word basis.

The primary and secondary Flash memories require the MCU to send an instruction to

program a word or to erase sectors (see Table 28).

Once the MCU issues a Flash memory Program or Erase instruction, it must check the

status bits for completion. The embedded algorithms that are invoked inside the PSD

support several means to provide status to the MCU. Status may be checked using any of

three methods: Data Polling, Data Toggle, or Ready/Busy (PE4) signal.

8.1

Data polling

Polling on the Data Polling bit (DQ7/DQ15) is a method of checking whether a Program or

Erase cycle is in progress or has completed. Figure 5 shows the Data Polling algorithm.

When the MCU issues a Program instruction, the embedded algorithm within the PSD

begins. The MCU then reads the location of the word to be programmed in Flash memory to

check the status. The Data Polling bit (DQ7/DQ15) becomes the complement of the

corresponding bit of the original data word to be programmed. The MCU continues to poll

this location, comparing data and monitoring the Error Flag bit (DQ5/DQ13). When the Data

Polling bit (DQ7/DQ15) matches the corresponding bit of the original data, and the Error

Flag bit (DQ5/DQ13) remains 0, the embedded algorithm is complete. If the Error Flag bit

(DQ5/DQ13) is 1, the MCU should test the Data Polling bit (DQ7/DQ15) again since the

Data Polling bit (DQ7/DQ15) may have changed simultaneously with the Error Flag bit

(DQ5/DQ13, see Figure 5).

The Error Flag bit (DQ5/DQ13) is set if either an internal timeout occurred while the

embedded algorithm attempted to program the location or if the MCU attempted to program

a ’1’ to a bit that was not erased (not erased is logic 0).

It is suggested (as with all Flash memories) to read the location again after the embedded

programming algorithm has completed, to compare the word that was written to the Flash

memory with the word that was intended to be written.

When using the Data Polling method during an Erase cycle, Figure 5 still applies. However,

the Data Polling bit (DQ7/DQ15) is 0 until the Erase cycle is complete. A '1' on the Error Flag

bit (DQ5/DQ13) indicates a timeout condition on the Erase cycle, a ’0’ indicates no error.

The MCU can read any even location within the sector being erased to get the Data Polling

bit(DQ7/DQ15) and the Error Flag bit (DQ5/DQ13).

PSDsoft Express generates ANSI C code functions that implement these Data Polling

algorithms.

PSD4235G2V Datasheet(PDF) 39 Page - STMicroelectronics