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PSD4235G2V Datasheet(PDF) 45 Page - STMicroelectronics

Part # PSD4235G2V
Description  Flash in-system programmable (ISP) peripherals for 16-bit MCUs (3.3 V supply)
PDF  124 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD4235G2V Datasheet(HTML) 45 Page - STMicroelectronics

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PSD4235G2V
Specific features
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10
Specific features
10.1
Flash Memory Sector Protect
Each sector of primary or secondary Flash memory can be separately protected against
Program and Erase cycles. Sector Protection provides additional data security because it
disables all Program or Erase cycles. This mode can be activated (or deactivated) through
the JTAG-ISP Port or a device programmer.
Sector protection can be selected for each sector using the PSDsoft Express program. This
automatically protects selected sectors when the device is programmed through the JTAG
Port or a device programmer. Flash memory sectors can be unprotected to allow updating of
their contents using the JTAG Port or a device programmer. The MCU can read (but cannot
change) the sector protection bits.
Any attempt to program or erase a protected Flash memory sector is ignored by the device.
The Verify operation results in a READ of the protected data. This allows a guarantee of the
retention of the Protection status.
The sector protection status can be read by the MCU through the Flash memory protection
and secondary Flash memory protection registers (in the CSIOP block) or use the Read
Sector Protection instruction. See Table 18 to Table 19.
10.2
Reset
The Reset instruction consists of one WRITE cycle (see Table 28). It can also be optionally
preceded by the standard two WRITE decoding cycles (writing AAh to AAAh, and 55h to
554h).
The Reset instruction must be executed after:
●
Reading the Flash Protection Status or Flash ID
●
An Error condition has occurred (and the device has set the Error Flag bit (DQ5/DQ13)
to ’1’) during a Flash memory Program or Erase cycle.
The Reset instruction immediately puts the Flash memory back into normal READ mode.
However, if there is an error condition (with the Error Flag bit (DQ5/DQ13) set to ’1’) the
Flash memory will return to the READ mode in 25
μs after the Reset instruction is issued.
The Reset instruction is ignored when it is issued during a Program or Bulk Erase cycle of
the Flash memory. The Reset instruction aborts any on-going Sector Erase cycle, and
returns the Flash memory to the normal READ mode in 25
μs.
10.3
Reset (RESET) pin
A pulse on the Reset (RESET) pin aborts any cycle that is in progress, and resets the Flash
memory to the READ mode. When the reset occurs during a Program or Erase cycle, the
Flash memory takes up to 25
μs to return to the READ mode. It is recommended that the
Reset (RESET) pulse (except for Power-on Reset, as described in Section 21.1) be at least
25
μs so that the Flash memory is always ready for the MCU to fetch the bootstrap
instructions after the Reset cycle is complete.



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