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PIC24F04KA201 Datasheet(PDF) 37 Page - Microchip Technology |
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PIC24F04KA201 Datasheet(HTML) 37 Page - Microchip Technology |
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37 / 48 page ![]() PIC24FXXKAXXX © 2008 Microchip Technology Inc. Advance Information DS39919A-page 37 Expected Response (2 words): 1F00h 0002h 5.2.11 PROGP COMMAND The PROGP command instructs the programming executive to program one row of code memory to the specified memory address. Programming begins with the row address specified in the command. The destination address should be a multiple of 40h. The data to program to memory, located in command words, D_1 through D_48, should be arranged using the packed instruction word format depicted in Figure 5-5. After the entire data is programmed to code memory, the programming executive verifies the programmed data against the data in the command. The PROGP command is also used to program Configuration Words. While PROGP is used to program Configuration Words, the length in the command should be four. Only one Configuration Word at a time can be programed. The unimplemented bits of the Configuration Word should be stuffed with ‘1’s. Expected Response (2 words): 1500h 0002h 5.2.12 QBLANK COMMAND The QBLANK command queries the programming exec- utive to determine if the contents of code memory and code-protect Configuration bits (GCP and GWRP) are blank (contain all ‘1’s). The size of the code memory to check should be specified in the command. The Blank Check for code memory begins at 0h and advances toward larger addresses for the specified number of instruction words. QBLANK returns a QE_Code of F0h if the specified code memory and code-protect bits are blank; otherwise, it returns a QE_Code of 0Fh. Expected Response (2 words for blank device): 1AF0h 0002h Expected Response (2 words for non-blank device): 1A0Fh 0002h Note: Refer to Table 2-4 for data EEPROM memory size information. 15 12 11 8 7 0 Opcode Length Reserved Addr_MSB Addr_LS D_1 D_2 ... D_48 Field Description Opcode 5h Length 33h Reserved 0h Addr_MSB MSb of 24-bit destination address. Addr_LS Least Significant 16 bits of 24-bit destination address. D_1 16-bit data word 1. D_2 16-bit data word 2. ... 16-bit data word 3 through 47. D_48 16-bit data word 48. Note: Refer to Table 2-3 for code memory size information. 15 12 11 0 Opcode Length PSize Reserved DSize Field Description Opcode Ah Length 3h PSize Length of program memory to check in 24-bit words (max. of 49152). Reserved 0h DSize Length of data memory to check in 16-bit words (max. of 2048). Note: QBLANK does not check the system operation Configuration bits as these bits are not set to ‘1’ when a Chip Erase is performed. |
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