 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PIC24F04KA201 Datasheet(PDF) 5 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC24F04KA201 Datasheet(HTML) 5 Page - Microchip Technology |
|
|
5 / 48 page  PIC24FXXKAXXX © 2008 Microchip Technology Inc. Advance Information DS39919A-page 5 3.0 DEVICE PROGRAMMING – ICSP The ICSP method is a special programming protocol that allows reading and writing to the PIC24FXXKAXXX device family memory. ICSP is the most direct method used to program a device; however, Enhanced ICSP is faster. The ICSP mode also reads the contents of the executive memory to determine if the programming executive is present. This is accomplished by applying control codes and instructions, serially to the device, using PGCx and PGDx pins. In ICSP mode, the system clock is taken from the PGCx pin regardless of the device‘s oscillator Configuration bits. All of the instructions are shifted serially to an internal buffer, loaded into the Instruction Register (IR), and then executed. No program is fetched from the internal memory. Instructions are fed in 24 bits at a time. PGDx is used to shift data in, and PGCx is used as both the serial shift clock and the CPU execution clock. 3.1 Overview of the Programming Process Figure 3-1 illustrates the high-level overview of the programming process. After entering the ICSP mode, perform the following: 1. Bulk Erase the device. 2. Program and verify the code memory. 3. Program and verify the data EEPROM memory. 4. Program and verify the device configuration. 5. Program the code-protect Configuration bits if required. FIGURE 3-1: HIGH–LEVEL ICSP™ PROGRAMMING FLOW 3.2 ICSP Operation Upon entry into ICSP mode, the CPU is Idle. An internal state machine governs the execution of the CPU. A 4-bit control code is clocked in, using PGCx and PGDx, and this control code is used to command the CPU (see Table 3-1). The SIX control code is used to send instructions to the CPU for execution, and the REGOUT control code is used to read data out of the device via the VISI register. TABLE 3-1: CPU CONTROL CODES IN ICSP™ MODE Note: During ICSP operation, the operating frequency of PGCx should not exceed 10 MHz. 4-Bit Control Code Mnemonic Description 0000b SIX Shift in 24-bit instruction and execute. 0001b REGOUT Shift out the VISI (0784h) register. 0010b-1111b N/A This is reserved. Start Perform Bulk Erase Program Memory Verify Program End Enter ICSP™ Mode Program Configuration Bits Verify Configuration Bits Exit ICSP Mode Program Data EEPROM Memory Verify Data EEPROM Memory |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
