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PIC24F04KA201 Datasheet(PDF) 41 Page - Microchip Technology |
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PIC24F04KA201 Datasheet(HTML) 41 Page - Microchip Technology |
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41 / 48 page ![]() PIC24FXXKAXXX © 2008 Microchip Technology Inc. Advance Information DS39919A-page 41 Step 10: Load W0:W2 with the next two words of packed programming executive code. 0000 0000 0000 2<LSW0>0 2<MSB1:MSB0>1 2<LSW1>2 MOV #<LSW0>, W0 MOV #<MSB1:MSB0>, W1 MOV #<LSW1>, W2 Step 11: Set the Read Pointer (W6) and load the (next four write) latches. 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 EB0300 000000 BB0BB6 000000 000000 BBDBB6 000000 000000 BBEBB6 000000 000000 BB1BB6 000000 000000 CLR W4 NOP TBLWTL [W4++], [W5] NOP NOP TBLWTH.B [W4++], [W5++] NOP NOP TBLWTH.B [W4++], [++W5] NOP NOP TBLWTL [W4++], [W5++] NOP NOP Step 12: Repeat Steps 10 and 11, sixteen times, to load the write latches for the 32 instructions. Step 13: Initiate the programming cycle. 0000 0000 0000 A8E761 000000 000000 BSET NVMCON, #15 NOP NOP Step 14: Repeatedly read the NVMCON register and poll for WR bit to get cleared. 0000 0000 0000 0000 0000 0000 0001 0000 040200 000000 803B02 883C22 000000 000000 <VISI> 000000 GOTO 0x200 NOP MOV NVMCON, W2 MOV W2, VISI NOP NOP Clock out contents of the VISI register. NOP Step 15: Reset the device internal PC. 0000 0000 040200 000000 GOTO 0x200 NOP Step 16: Repeat Steps 8 through 15 until all the last, but one (31) row of executive memory, has been programmed. Step 17: Repeat Steps 10 and 11, 12 times, to load the first 24 write latches. TABLE 5-5: PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED) Command (Binary) Data (Hex) Description |
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