10

Integrated Silicon Solution, Inc. — www.issi.com

Rev. D

06/21/2011

IS61WV12816DALL/DALS, IS61WV12816DBLL/DBLS,

IS64WV12816DBLL/DBLS

-20 ns

-25 ns

-35 ns

-45 ns

Symbol

Parameter

Min. Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

ReadCycleTime

20

—

25

—

35

—

45

—

ns

AddressAccessTime

—

20

—

25

—

35

—

45

ns

OutputHoldTime

2.5

—

6

—

8

—

10

—

ns

CEAccessTime

—

20

—

25

—

35

—

45

ns

OEAccessTime

—

8

—

12

—

15

—

20

ns

OEtoHigh-ZOutput

0

8

0

8

0

10

0

15

ns

OEtoLow-ZOutput

0

—

0

—

0

—

0

—

ns

CEtoHigh-ZOutput

0

8

0

8

0

10

0

15

ns

CEtoLow-ZOutput

3

—

10

—

10

—

10

—

ns

LB,UBAccessTime

—

8

—

25

—

35

—

45

ns

LB,UBtoHigh-ZOutput

0

8

0

8

0

10

0

15

ns

LB,UBtoLow-ZOutput

0

—

0

—

0

—

0

—

ns

Notes:

1. Test conditions assume signal transition times of 1.5 ns or less, timing reference levels of 1.25V, input pulse levels of 0.4V to

2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.