14

Integrated Silicon Solution, Inc. — www.issi.com

Rev. D

06/21/2011

IS61WV12816DALL/DALS, IS61WV12816DBLL/DBLS,

IS64WV12816DBLL/DBLS

DATA UNDEFINED

LOW

VALID ADDRESS

HIGH-Z

ADDRESS

CE

UB, LB

WE

OE

UB_CEWR2.eps

Notes:

1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the

CE and WE inputs and at least one of

the

LB and UB inputs being in the LOW state.

2. WRITE = (

AC WAVEFORMS

DATA UNDEFINED

VALID ADDRESS

HIGH-Z

ADDRESS

CE

UB, LB

WE

UB_CEWR1.eps