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WM8983GEFL/V Datasheet(PDF) 46 Page - Wolfson Microelectronics plc |
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WM8983GEFL/V Datasheet(HTML) 46 Page - Wolfson Microelectronics plc |
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46 / 124 page ![]() WM8983 Production Data w PD, Rev 4.3, May 2010 46 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0010 (182us/6dB) ALC attack (gain ramp-down) time (ALCMODE == 1) Per step Per 6dB 90% of range 0000 22.7us 182.4us 1.31ms 0001 45.4us 363.2us 2.62ms 0010 90.8us 726.4us 5.26ms … (time doubles with every step) 1010 23.2ms 186ms 1.348s Table 19 ALC Control Registers When the ALC is disabled, the input PGA remains at the last controlled value of the ALC. An input gain update must be made by writing to the INPPGAVOLL/R register bits. NORMAL MODE In normal mode, the ALC will attempt to maintain a constant signal level by increasing or decreasing the gain of the PGA. The following diagram shows an example of this. Figure 23 ALC Normal Mode Operation |
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