PIC24FJ128GA310 datasheet(91/406 Pages) MICROCHIP

91 / 406 page

 2010-2011 Microchip Technology Inc.

DS39996F-page 91

PIC24FJ128GA310 FAMILY

bit 5

SWDTEN:

Software Enable/Disable of WDT bit(4)

= WDT is enabled

= WDT is disabled

bit 4

WDTO:

Watchdog Timer Time-out Flag bit(1)

= WDT time-out has occurred

= WDT time-out has not occurred

bit 3

SLEEP:

Wake From Sleep Flag bit(1)

= Device has been in Sleep mode

= Device has not been in Sleep mode

bit 2

IDLE:

Wake-up From Idle Flag bit(1)

= Device has been in Idle mode

= Device has not been in Idle mode

bit 1

BOR:

Brown-out Reset Flag bit(1)

= A Brown-out Reset has occurred (also set after a Power-on Reset).

= A Brown-out Reset has not occurred

bit 0

POR:

Power-on Reset Flag bit(1)

= A Power-on Reset has occurred

= A Power-on Reset has not occurred

RCON: RESET CONTROL REGISTER (CONTINUED)

Note 1:

All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not

cause a device Reset.

If the LPCFG Configuration bit is 1’ (unprogrammed), the retention regulator is disabled and the RETEN bit

has no effect.

Re-enabling the regulator after it enters Standby mode will add a delay, TVREG, when waking up from

Sleep. Applications that do not use the voltage regulator should set this bit to prevent this delay from

occurring.

If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the

SWDTEN bit setting.

PIC24FJ128GA310 Datasheet(PDF) 91 Page - Microchip Technology

PIC24FJ128GA310 Datasheet(HTML) 91 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL