MC68HSC705C8ACFS datasheet(98/222 Pages) FREESCALE

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Technical Data

MC68HC705C8A — Rev. 3

Capture/Compare Timer

Reading TRH returns the current value of the high byte of the counter

and causes the low byte to be latched into a buffer, as shown in

Figure 8-8. The buffer value remains fixed even if the high byte is read

more than once. Reading TRL reads the transparent low byte buffer and

completes the read sequence of the timer registers.

Figure 8-8. Timer Register Reads

NOTE:

To prevent interrupts from occurring between readings of TRH and TRL,

set the interrupt mask (I bit) in the condition code register before reading

TRH, and clear the mask after reading TRL.

8.4.4 Alternate Timer Registers

The alternate timer registers (ATRH and ATRL) shown in Figure 8-9

contain the current high and low bytes of the 16-bit counter. Reading

ATRH before reading ATRL causes ATRL to be latched until ATRL is

read. Reading does not affect the timer overflow flag (TOF). Writing to

the alternate timer registers has no effect.

LOW BYTE BUFFER

$0018

$0019

TIMER REGISTER HIGH

TIMER REGISTER LOW

READ TRH

LATCH

INTERNAL DATA BUS

Freescale Semiconductor, Inc.

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MC68HSC705C8ACFS Datasheet(PDF) 98 Page - Freescale Semiconductor, Inc