M68ICS08GR datasheet(317/408 Pages) FREESCALE

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Serial Peripheral Interface (SPI)

Low-Power Modes

MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

Serial Peripheral Interface (SPI)

317

By not resetting the SPRF, OVRF, and MODF flags, the user can still

service these interrupts after the SPI has been disabled. The user can

disable the SPI by writing 0 to the SPE bit. The SPI can also be disabled

by a mode fault occurring in an SPI that was configured as a master with

the MODFEN bit set.

20.11 Low-Power Modes

The WAIT and STOP instructions put the MCU in low power-

consumption standby modes.

20.11.1 Wait Mode

The SPI module remains active after the execution of a WAIT instruction.

In wait mode the SPI module registers are not accessible by the CPU.

Any enabled CPU interrupt request from the SPI module can bring the

MCU out of wait mode.

If SPI module functions are not required during wait mode, reduce power

consumption by disabling the SPI module before executing the WAIT

instruction.

To exit wait mode when an overflow condition occurs, enable the OVRF

bit to generate CPU interrupt requests by setting the error interrupt

enable bit (ERRIE). See Interrupts.

20.11.2 Stop Mode

The SPI module is inactive after the execution of a STOP instruction.

The STOP instruction does not affect register conditions. SPI operation

resumes after an external interrupt. If stop mode is exited by reset, any

transfer in progress is aborted, and the SPI is reset.

Freescale Semiconductor, Inc.

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M68ICS08GR Datasheet(PDF) 317 Page - Freescale Semiconductor, Inc