Dual 8-/10-/12-Bit, High Bandwidth,

Multiplying DACs with Serial Interface

AD5429/AD5439/AD5449

Rev. C

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FEATURES

10 MHz multiplying bandwidth

INL of ±0.25 LSB @ 8 bits

16-lead TSSOP package

2.5 V to 5.5 V supply operation

±10 V reference input

50 MHz serial interface

2.47 MSPS update rate

Extended temperature range: −40°C to +125°C

4-quadrant multiplication

Power-on reset

0.5 μA typical current consumption

Guaranteed monotonic

Daisy-chain mode

Readback function

APPLICATIONS

Portable battery-powered applications

Waveform generators

Analog processing

Instrumentation applications

Programmable amplifiers and attenuators

Digitally controlled calibration

Programmable filters and oscillators

Composite video

Ultrasound

Gain, offset, and voltage trimming

GENERAL DESCRIPTION

dual-channel, current output digital-to-analog converters (DAC),

respectively. These devices operate from a 2.5 V to 5.5 V power

supply, making them suited to battery-powered and other

applications.

As a result of being manufactured on a CMOS submicron process,

these parts offer excellent 4-quadrant multiplication character-

istics, with large signal multiplying bandwidths of 10 MHz.

the full-scale output current. An integrated feedback resistor

(RFB) provides temperature tracking and full-scale voltage

output when combined with an external current-to-voltage

precision amplifier.

These DACs use a double-buffered, 3-wire serial interface that

is compatible with SPI, QSPI™, MICROWIRE™, and most DSP

interface standards. In addition, a serial data out (SDO) pin allows

daisy-chaining when multiple packages are used. Data readback

allows the user to read the contents of the DAC register via the

SDO pin. On power-up, the internal shift register and latches

are filled with 0s, and the DAC outputs are at zero scale.

The AD5429/AD5439/AD5449 DACs are available in 16-lead

TSSOP packages.

FUNCTIONAL BLOCK DIAGRAM

SYNC

AD5429/AD5439/AD5449

SCLK

SDIN

8-/10-/12-BIT

R-2R DAC A

8-/10-/12-BIT

R-2R DAC B

POWER-ON

RESET

DAC

REGISTER

DAC

REGISTER

RFB

R

RFB

R

LDAC

CLR

INPUT

REGISTER

INPUT

REGISTER

SHIFT

REGISTER

LDAC

SDO

Figure 1.