EVAL-AD5449EBZ datasheet(24/32 Pages) AD

24 / 32 page

AD5429/AD5439/AD5449

Rev. C | Page 24 of 32

PCB LAYOUT AND POWER SUPPLY DECOUPLING

In any circuit where accuracy is important, careful considera-

tion of the power supply and ground return layout helps to

ensure the rated performance. The printed circuit board on

which the AD5429/AD5439/AD5449 is mounted should be

designed so that the analog and digital sections are separate

and confined to certain areas of the board. If the DAC is in a

system where multiple devices require an AGND-to-DGND

connection, the connection should be made at one point only.

The star ground point should be established as close as possible

to the device.

The DAC should have ample supply bypassing of 10 μF in parallel

with 0.1 μF on the supply, located as close as possible to the

package, ideally right up against the device. The 0.1 μF capacitor

should have low effective series resistance (ESR) and low effective

series inductance (ESI), such as the common ceramic types of

capacitors that provide a low impedance path to ground at high

frequencies, to handle transient currents due to internal logic

switching. Low ESR, 1 μF to 10 μF tantalum or electrolytic

capacitors should also be applied at the supplies to minimize

transient disturbance and filter out low frequency ripple.

Components, such as clocks, that produce fast-switching signals,

should be shielded with digital ground to avoid radiating noise

to other parts of the board, and they should never be run near

the reference inputs.

Avoid crossover of digital and analog signals. Traces on opposite

sides of the board should run at right angles to each other. This

layout reduces the effects of feedthrough on the board. A micro-

strip technique is by far the best method, but its use is not always

possible with a double-sided board. In this technique, the compo-

nent side of the board is dedicated to the ground plane, and

signal traces are placed on the soldered side.

It is good practice to use compact, minimum lead-length PCB

layout design. Leads to the input should be as short as possible

to minimize IR drops and stray inductance.

The PCB metal traces between VREFx and RFBx should also be

matched to minimize gain error. To maximize high frequency

performance, the I-to-V amplifier should be located as close as

possible to the device.

EVALUATION BOARD FOR THE DAC

The evaluation board consists of an AD5429/AD5439/AD5449

DAC and a current-to-voltage amplifier, the AD8065. Included

on the evaluation board is a 10 V reference, the ADR01. An

external reference can also be applied via an SMB input.

The evaluation kit consists of a CD-ROM with self-installing

PC software to control the DAC. The software allows the user

to write a code to the device.

Power Supplies for the Evaluation Board

The board requires ±12 V and +5 V supplies. The +12 V VDD

and −12 V VSS are used to power the output amplifier; the +5 V

supply is used to power the DAC (VDD) and transceivers (VCC).

Both supplies are decoupled to their respective ground plane

with 10 μF tantalum and 0.1 μF ceramic capacitors.

EVAL-AD5449EBZ Datasheet(PDF) 24 Page - Analog Devices

EVAL-AD5449EBZ Datasheet(HTML) 24 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL