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DSPIC30F2011AT-30E/S Datasheet(PDF) 232 Page - Microchip Technology

Part # DSPIC30F2011AT-30E/S
Description  High-Performance, 16-Bit Digital Signal Controllers
PDF  238 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC30F2011AT-30E/S Datasheet(HTML) 232 Page - Microchip Technology

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dsPIC30F6011A/6012A/6013A/6014A
DS70143C-page 230
Preliminary
© 2006 Microchip Technology Inc.
O
OC/PWM Module Timing Characteristics.......................... 195
Operating Current (IDD)..................................................... 177
Oscillator
Control Registers ...................................................... 149
Operating Modes (Table) .......................................... 144
System Overview ...................................................... 143
Oscillator Configurations ................................................... 146
Fail-Safe Clock Monitor............................................. 148
Fast RC (FRC) .......................................................... 147
Initial Clock Source Selection ................................... 146
Low-Power RC (LPRC) ............................................. 148
LP Oscillator Control ................................................. 147
Phase Locked Loop (PLL) ........................................ 147
Start-up Timer (OST) ................................................ 147
Oscillator Selection ........................................................... 143
Oscillator Start-up Timer
Timing Characteristics .............................................. 189
Timing Requirements ................................................ 190
Output Compare Interrupts ................................................. 89
Output Compare Module ..................................................... 87
Register Map............................................................... 90
Timing Characteristics .............................................. 194
Timing Requirements ................................................ 194
Output Compare Operation During CPU Idle Mode ............ 89
Output Compare Sleep Mode Operation............................. 89
P
Packaging Information ...................................................... 215
Marking ..................................................................... 215
Peripheral Module Disable (PMD) Registers .................... 160
PICSTART Plus Development Programmer ..................... 174
Pinout Descriptions ............................................................. 12
POR. See Power-on Reset.
PORTA
Register Map for dsPIC30F6013A/6014A................... 65
PORTB
Register Map for dsPIC30F6011A/6012A/
6013A/6014A ...................................................... 65
PORTC
Register Map for dsPIC30F6011A/6012A................... 65
Register Map for dsPIC30F6013A/6014A................... 65
PORTD
Register Map for dsPIC30F6011A/6012A................... 66
Register Map for dsPIC30F6013A/6014A................... 66
PORTF
Register Map for dsPIC30F6011A/6012A................... 66
Register Map for dsPIC30F6013A/6014A................... 66
PORTG
Register Map for dsPIC30F6011A/6012A/
6013A/6014A ...................................................... 66
Power Saving Modes
Idle ............................................................................ 159
Sleep ......................................................................... 158
Power-Down Current (IPD) ................................................ 179
Power-on Reset (POR) ..................................................... 143
Oscillator Start-up Timer (OST) ................................ 143
Power-up Timer (PWRT) .......................................... 143
Power-Saving Modes ........................................................ 158
Power-Saving Modes (Sleep and Idle).............................. 143
Power-up Timer
Timing Characteristics .............................................. 189
Timing Requirements ................................................ 190
Program Address Space ..................................................... 25
Construction ................................................................ 27
Data Access from Program Memory Using
Program Space Visibility..................................... 29
Data Access from Program Memory Using Table
Instructions ......................................................... 28
Data Access from, Address Generation ..................... 27
Data Space Window into Operation............................ 30
Data Table Access (Least Significant Word) .............. 28
Data Table Access (MSB) .......................................... 29
Memory Map for dsPIC30F6011A/6013A................... 26
Memory Map for dsPIC30F6012A/6014A................... 26
Table Instructions
TBLRDH ............................................................. 28
TBLRDL .............................................................. 28
TBLWTH ............................................................. 28
TBLWTL ............................................................. 28
Program and EEPROM Characteristics............................ 183
Program Counter ................................................................ 16
Programmable .................................................................. 143
Programmer’s Model .......................................................... 16
Diagram ...................................................................... 17
Programming Operations.................................................... 53
Algorithm for Program Flash....................................... 53
Erasing a Row of Program Memory............................ 53
Initiating the Programming Sequence......................... 54
Loading Write Latches ................................................ 54
Protection Against Accidental Writes to OSCCON ........... 149
R
Reader Response............................................................. 234
Reset ........................................................................ 143, 153
Reset Sequence ................................................................. 47
Reset Sources ............................................................ 47
Reset Sources
Brown-out Reset (BOR).............................................. 47
Illegal Instruction Trap ................................................ 47
Trap Lockout............................................................... 47
Uninitialized W Register Trap ..................................... 47
Watchdog Time-out .................................................... 47
Reset Timing Characteristics............................................ 189
Reset Timing Requirements ............................................. 190
Resets
Brown-out Rest (BOR), Programmable .................... 155
POR with Long Crystal Start-up Time....................... 155
POR, Operating without FSCM and PWRT .............. 155
Power-on Reset (POR)............................................. 154
RTSP Operation ................................................................. 52
Run-Time Self-Programming (RTSP) ................................. 51
S
Serial Peripheral Interface. See SPI
Simple Capture Event Mode ............................................... 83
Buffer Operation ......................................................... 84
Hall Sensor Mode ....................................................... 84
Prescaler .................................................................... 83
Timer2 and Timer3 Selection Mode............................ 84
Simple OC/PWM Mode Timing Requirements ................. 195
Simple Output Compare Match Mode ................................ 88
Simple PWM Mode ............................................................. 88
Input Pin Fault Protection ........................................... 88
Period ......................................................................... 89
Software Simulator (MPLAB SIM) .................................... 172
Software Stack Pointer, Frame Pointer .............................. 16
CALL Stack Frame ..................................................... 35



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