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PIC18F8722IPTSQTP Datasheet(PDF) 28 Page - Microchip Technology

Part # PIC18F8722IPTSQTP
Description  64/80-Pin, 1-Mbit, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  446 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F8722IPTSQTP Datasheet(HTML) 28 Page - Microchip Technology

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PIC18F8722 FAMILY
DS39646C-page 26
© 2008 Microchip Technology Inc.
PORTE is a bidirectional I/O port.
RE0/AD8/RD/P2D
RE0
AD8
RD
P2D
4
I/O
I/O
I
O
ST
TTL
TTL
—
Digital I/O.
External memory address/data 8.
Read control for Parallel Slave Port.
ECCP2 PWM output D.
RE1/AD9/WR/P2C
RE1
AD9
WR
P2C
3
I/O
I/O
I
O
ST
TTL
TTL
—
Digital I/O.
External memory address/data 9.
Write control for Parallel Slave Port.
ECCP2 PWM output C.
RE2/AD10/CS/P2B
RE2
AD10
CS
P2B
78
I/O
I/O
I
O
ST
TTL
TTL
—
Digital I/O.
External memory address/data 10.
Chip select control for Parallel Slave Port.
ECCP2 PWM output B.
RE3/AD11/P3C
RE3
AD11
P3C(4)
77
I/O
I/O
O
ST
TTL
—
Digital I/O.
External memory address/data 11.
ECCP3 PWM output C.
RE4/AD12/P3B
RE4
AD12
P3B(4)
76
I/O
I/O
O
ST
TTL
—
Digital I/O.
External memory address/data 12.
ECCP3 PWM output B.
RE5/AD13/P1C
RE5
AD13
P1C(4)
75
I/O
I/O
O
ST
TTL
—
Digital I/O.
External memory address/data 13.
ECCP1 PWM output C.
RE6/AD14/P1B
RE6
AD14
P1B(4)
74
I/O
I/O
O
ST
TTL
—
Digital I/O.
External memory address/data 14.
ECCP1 PWM output B.
RE7/AD15/ECCP2/P2A
RE7
AD15
ECCP2(3)
P2A(3)
73
I/O
I/O
I/O
O
ST
TTL
ST
—
Digital I/O.
External memory address/data 15.
Enhanced Capture 2 input/Compare 2 output/
PWM 2 output.
ECCP2 PWM output A.
TABLE 1-4:
PIC18F8527/8622/8627/8722 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input
CMOS
= CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels Analog= Analog input
I
= Input
O
= Output
P= Power
I2C™/SMB
= I2C/SMBus input buffer
Note 1:
Alternate assignment for ECCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
2:
Default assignment for ECCP2 in all operating modes (CCP2MX is set).
3:
Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only).
4:
Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set).
5:
Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear).



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