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PIC18F8722IPTSQTP Datasheet(PDF) 73 Page - Microchip Technology

Part # PIC18F8722IPTSQTP
Description  64/80-Pin, 1-Mbit, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  446 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F8722IPTSQTP Datasheet(HTML) 73 Page - Microchip Technology

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© 2008 Microchip Technology Inc.
DS39646C-page 71
PIC18F8722 FAMILY
5.2.4
TWO-WORD INSTRUCTIONS
The standard PIC18 instruction set has 8 two-word
instructions: CALL, MOVFF, GOTO, LSFR, ADDULNK,
CALLW,
MOVSS
and SUBULNK. In all cases, the
second word of the instructions always has ‘1111’ as
its four Most Significant bits; the other 12 bits are literal
data, usually a data memory address.
The use of ‘1111’ in the 4 MSbs of an instruction spec-
ifies a special form of NOP. If the instruction is executed
in proper sequence – immediately after the first word –
the data in the second word is accessed and used by
the instruction sequence. If the first word is skipped for
some reason and the second word is executed by itself,
a NOP is executed instead. This is necessary for cases
when the two-word instruction is preceded by a condi-
tional instruction that changes the PC. Example 5-4
shows how this works.
EXAMPLE 5-4:
TWO-WORD INSTRUCTIONS
Note:
See
Section 5.6
“PIC18
Instruction
Execution and the Extended Instruc-
tion Set” for information on two-word
instructions in the extended instruction set.
CASE 1:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2
; No, skip this word
1111 0100 0101 0110
; Execute this word as a NOP
0010 0100 0000 0000
ADDWF
REG3
; continue code
CASE 2:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2
; Yes, execute this word
1111 0100 0101 0110
; 2nd word of instruction
0010 0100 0000 0000
ADDWF
REG3
; continue code



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