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PSD833F2 Datasheet(PDF) 105 Page - STMicroelectronics |
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PSD833F2 Datasheet(HTML) 105 Page - STMicroelectronics |
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105 / 128 page  PSD8XXFX AC/DC parameters Doc ID 7833 Rev 7 105/128 Figure 43. Input macrocell timing (product term clock) tINH tINL tINO tIH tIS PT CLOCK INPUT OUTPUT AI03101 Table 54. Input macrocell timing (5 V devices) Symbol Parameter Conditions -70 -90 -15 PT Aloc Turbo off Unit Min Max Min Max Min Max tIS Input setup time (1) 000 ns tIH Input hold time (1) 15 20 26 + 10 ns tINH NIB input high time (1) 912 18 ns tINL NIB input low time (1) 912 18 ns tINO NIB input to combinatorial delay (1) 34 46 59 + 2 + 10 ns 1. Inputs from port A, B, and C relative to register/ latch clock from the PLD. ALE/AS latch timings refer to tAVLX and tLXAX. Table 55. input macrocell timing (3 V devices) Symbol Parameter Conditions -12 -15 -20 PT Aloc Turbo off Unit Min Max Min Max Min Max tIS Input setup time (1) 000 ns tIH Input hold time (1) 25 25 30 + 20 ns tINH NIB input high time (1) 12 13 15 ns tINL NIB input low time (1) 12 13 15 ns tINO NIB input to combinatorial delay (1) 46 62 70 + 4 + 20 ns 1. Inputs from port A, B, and C relative to register/ latch clock from the PLD. ALE latch timings refer to tAVLX and tLXAX. Obsolete Product(s) - Obsolete Product(s) |
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