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PIC18F4550ESOSQTP Datasheet(PDF) 123 Page - Microchip Technology |
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PIC18F4550ESOSQTP Datasheet(HTML) 123 Page - Microchip Technology |
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123 / 430 page  © 2007 Microchip Technology Inc. Preliminary DS39632D-page 121 PIC18F2455/2550/4455/4550 TABLE 10-7: PORTD I/O SUMMARY Pin Function TRIS Setting I/O I/O Type Description RD0/SPP0 RD0 0 OUT DIG LATD<0> data output. 1 IN ST PORTD<0> data input. SPP0 1 OUT DIG SPP<0> output data; takes priority over port data. 1 IN TTL SPP<0> input data. RD1/SPP1 RD1 0 OUT DIG LATD<1> data output. 1 IN ST PORTD<1> data input. SPP1 1 OUT DIG SPP<1> output data; takes priority over port data. 1 IN TTL SPP<1> input data. RD2/SPP2 RD2 0 OUT DIG LATD<2> data output. 1 IN ST PORTD<2> data input. SPP2 1 OUT DIG SPP<2> output data; takes priority over port data. 1 IN TTL SPP<2> input data. RD3/SPP3 RD3 0 OUT DIG LATD<3> data output. 1 IN ST PORTD<3> data input. SPP3 1 OUT DIG SPP<3> output data; takes priority over port data. 1 IN TTL SPP<3> input data. RD4/SPP4 RD4 0 OUT DIG LATD<4> data output. 1 IN ST PORTD<4> data input. SPP4 1 OUT DIG SPP<4> output data; takes priority over port data. 1 IN TTL SPP<4> input data. RD5/SPP5/P1B RD5 0 OUT DIG LATD<5> data output 1 IN ST PORTD<5> data input SPP5 1 OUT DIG SPP<5> output data; takes priority over port data. 1 IN TTL SPP<5> input data. P1B 0 OUT DIG ECCP1 Enhanced PWM output, channel B; takes priority over port and SPP data.(1) RD6/SPP6/P1C RD6 0 OUT DIG LATD<6> data output. 1 IN ST PORTD<6> data input. SPP6 1 OUT DIG SPP<6> output data; takes priority over port data. 1 IN TTL SPP<6> input data. P1C 0 OUT DIG ECCP1 Enhanced PWM output, channel C; takes priority over port and SPP data.(1) RD7/SPP7/P1D RD7 0 OUT DIG LATD<7> data output. 1 IN ST PORTD<7> data input. SPP7 1 OUT DIG SPP<7> output data; takes priority over port data. 1 IN TTL SPP<7> input data. P1D 0 OUT DIG ECCP1 Enhanced PWM output, channel D; takes priority over port and SPP data.(1) Legend: OUT = Output, IN = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input Note 1: May be configured for tri-state during Enhanced PWM shutdown events. |
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