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AS3658F-BCTP Datasheet(PDF) 123 Page - ams AG |
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AS3658F-BCTP Datasheet(HTML) 123 Page - ams AG |
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123 / 158 page ![]() Table 128. Reg standby mode Bit definitions Addr:129 Reg standby mode These bits control the on/off function of the regulators during standby mode Bit Bit Name Default Access Description www.austriamicrosystems.com Revision 1v13 122 - 157 AS3658 Data Sheet Confidential - Deta il ed Descri ption - System Functi ons 6 Reg_low_bias_mode 0 R/W 0 Normal mode 1 The quiescent current of the following regulators is divided by approx. two: SD1, SD2, SD3, RF1, RF2, RF3. The current capability and performance is also reduce in that mode. (E.g. Use this bit only to reduce quiescent current, if system and processor is in a low power mode) 0 ldo_rf1_stby_on 0 R/W 0 RF1 LDO is disabled in standby mode 1 RF1 LDO is enabled in standby mode 1 ldo_rf2_stby_on 0 R/W 0 RF2 LDO is disabled in standby mode 1 RF2 LDO is enabled in standby mode 2 ldo_dig1_stby_on 0 R/W 0 DIG1 LDO is disabled in standby mode 1 DIG1 LDO is enabled in standby mode 3 ldo_dig2_stby_on 0 R/W 0 DIG2 LDO is disabled in standby mode 1 DIG2 LDO is enabled in standby mode 4 sd1_stby_on 0 R/W 0 Step down 1 is disabled in standby mode 1 Step down 1 is enabled in standby mode 5 sd2_stby_on 0 R/W 0 Step down 2 is disabled in standby mode 1 Step down 2 is enabled in standby mode 6 sd3_stby_on 0 R/W 0 Step down 3 is disabled in standby mode 1 Step down 3 is enabled in standby mode 7 cp_stby_on 0 R/W 0 Charge pump is disabled in standby mode 1 Charge pump is enabled in standby mode Table 127. Internal references Bit definitions Addr:59 Internal references Bit definitions These bits control the internal reference mode and internal clk frequency Bit Bit Name Default Access Description |
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