82375EB datasheet(49/131 Pages) INTEL

49 / 131 page

82375EBSB

290477 – 44

Figure 2 Block Diagram of Address Decoder

The PCEB provides three methods for decoding the current PCI Bus cycle The PCEB can use positive

subtractive or negative (82374SB only) decoding for these cycles depending on the type of cycle actions on

the PCI Bus and programming of the PCEB registers For EISA Bus cycles only positive decoding is used

1 Positive decoding With positive decoding the PCIEISA Bus cycle address is compared to the corre-

sponding address ranges set up in the PCEB for positive decode A match causes the PCEB decode logic to

immediately service the cycle The PCEB can be programmed (via the configuration registers) to positively

decode selected memory or IO accesses on both the PCI Bus and EISA Bus Depending on the program-

ming of the internal registers the PCEB provides positive decoding for PCI accesses to selected address

ranges in memory and IO spaces and for EISA accesses to selected address ranges in memory and IO

spaces Note that the decoding method for PCI accesses to the PCEB internal registers (configuration and

IO space registers) is not programmable and these accesses are always positively decoded

82375EB Datasheet(PDF) 49 Page - Intel Corporation