DocID023948 Rev 1

3/16

AN4208

Packing specifications and labeling description

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The Flip Chip tolerance on bump diameter and bump height are very tight. This constant

bump shape insures a good coplanarity between bumps. Optical measurements performed

through vertical focuses show a bump plus die coplanarity below 50 µm.

The product marking for the flat side is shown on Figure 3 (product example). The Flip Chip

has a pin marker - A1 (see Figure 1) on both the flat side and the bump side so that the

orientation of the component can be easily determined before and after assembly. The dots

marked on the flat side and on the bump side have been designed so that they can be

detected by standard vision systems.

Marking dimensions are linked to the die size.

Figure 3. Flip Chip marking example for 2 x 2 bump matrix array.

3

Packing specifications and labeling description

Flip Chips are delivered in tape and reel to be fully compatible with standard high volume

SMD components. The features of tape and reel materials are in accordance with

EIA-481-D, IEC 60286-3 and EIA 763 (783) standards. All features not specified in this

section are in accordance with EIA-481-D, IEC 60286-3 and EIA 763 (783) standards.

3.1

Carrier tape

Flip Chips are placed in the carrier tape with their bump side facing the bottom of the cavity

so that the components can be picked-up by their flat side. No flipping of the package is

necessary for mounting on PCB. The products are positioned in the carrier tape with pin A1

on the sprocket hole side. Carrier tape mechanical dimensions are shown in the example in

Figure 4. Standard tape width is 8 mm for die sizes smaller than 3 mm (dimension B0).

Note:

12 mm carrier tape width may be used for a larger die size to be in line with EIA standards.

x

Dot,

xx = marking

x