AN2485

Test results and significant waveforms

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Figure 22. shows the circuit behavior in case of mains dip. As previously described, the time

most critical transition, and a slower compensation in case of mains dip. As shown, in that

case the output voltage changes, but in few mains cycles it returns to the nominal value. A

of a PFC using the L6562 working in FOT and delivering a similar output power is shown. In

case of a mains dip, the output voltage variation is larger and the output voltage requires

more time to return to the original value.

Deriving a voltage proportional to the RMS line voltage implies a form of integration, which

has its own time constant. If the time constant is too small the voltage generated will be

affected by a considerable amount of ripple at twice the mains frequency so causing

distortion of the current reference (resulting in high THD and poor PF). If the time constant is

too large there will be a considerable delay in setting the right amount of feedforward,

resulting in excessive overshoot or undershoot of the pre-regulator's output voltage in

response to large line voltage changes. Clearly, a trade-off is required.

For reference, Figure 24. and Figure 25. compare the input current shape and the

THD and the third harmonic current are also decreased, but not very significantly. The time

Figure 22.

EVAL6563-400W Input mains dip

from 140 Vac to 90 Vac - full load -

Figure 23.

L6562 FOT Input mains dip from 90

input

CH1: Output voltage

CH2: Input rectified mains voltage

CH4: Input current

CH1: Output voltage

CH2: Input rectified mains voltage

CH4: Input current