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AN4149 Datasheet(PDF) 33 Page - STMicroelectronics

Part # AN4149
Description  Designing a CCM PFC pre-regulator based on the L4984D
PDF  43 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4149 Datasheet(HTML) 33 Page - STMicroelectronics

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DocID023523 Rev 2
33/43
AN4149
FOT PFC boost control loop
The transfer function of the compensated error amplifier is:
Equation 92
In order to calculate the values of the components of the compensation network, the
Venable K-Factor calculation is used, starting from the amount of phase margin needed at
the crossover frequency and the desired maximum 3rd harmonic distortion level D3.
Phase margin is defined as the difference between 180 ° and the actual phase lag at the
frequency where the open-loop gain is unity. The higher the phase margin, the more over-
damped the system is. As rule of thumb, to ensure fast transient response with a good level
of ringing, a phase margin of 60 ° has to be chosen.
The Venable K-factor is defined as:
Equation 93
The required E/A gain (at 2fL) in order to keep the distortion below the desired maximum 3
rd
harmonic distortion (D3) is:
Equation 94
while the unity frequency gain is:
Equation 95
The frequency of the zero and the pole of the compensation network can be found with the
following two expressions, where Go is the unity gain factor (equation 91).


⋅
⋅
⋅
+
+
⋅
⋅
⋅
+
⋅
⋅
=
2
1
2
2
1
2
2
1
_
1
1
1
1
)
(
C
C
R
s
C
C
s
C
R
s
C
R
s
G
H
INV
EA
%
2
3 =
D
°
=
Φ
60
m
732
.
3
180
cos
180
sin
1
=
⋅
⋅
+
=
m
m
K
φ
π
φ
π
2
2
1
2
2
2
)
(
2
3
0
3
2
out
r
m
in
p
S
ou t
C
COM P
f
V
K
k
P
k
R
D
V
V
V
D
H
Δ
+
⋅
⋅
⋅
⋅
⋅
⋅
=
Δ
−
⋅
⋅
=
018
.
0
2
81
.
14
2
27
.
0
1
23
.
0
4
.
380
10
8
011
.
0
2
02
.
0
2
3
2
=
+
⋅
⋅
⋅
⋅
Ω
⋅
⋅
⋅
=
−
V
W
H
f
2
2
min
_
0
4
K
H
f
H
f
LINE
⋅
⋅
=
π
763
.
0
732
.
3
018
.
0
47
4
2
0
=
⋅
⋅
=
Hz
H
π



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