 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AN2476 Datasheet(PDF) 13 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN2476 Datasheet(HTML) 13 Page - STMicroelectronics |
|
|
13 / 49 page  AN2476 Power supply and clocks 13/49 1.7.2 Peripheral clock scheme Figure 8. Peripheral clock Scheme ATM7TDMI-S EXTIT REGISTERS GPIO REGISTERS USB /4 or /8 REGISTERS & USB SRAM MRCC_PCLKEN(28) MRCC_PCLKEN(24) MRCC_PCLKEN(16) MRCC_PCLKEN(9) MRCC_PCLKEN(9) UART2 MRCC_PCLKEN(22) MRCC_PCLKEN(21) MRCC_PCLKEN(20) SSP1 MRCC_PCLKEN(14) MRCC_PCLKEN(13) MRCC_PCLKEN(18) CK_SYS HCLK (UP TO 64MHz) PWM 16-BIT REGISTERS SRAM FLASH SMI EIC MRCC REGISTERS MRCC_PCLKEN(0) ADC PRESCALER REGISTERS ADC CK_USB (48MHz) COUNTER 16-BIT PRESC TIM2 16-BIT REGISTERS COUNTER 16-BIT PRESC TIM1 16-BIT REGISTERS COUNTER 16-BIT PRESC TIM0 16-BIT REGISTERS COUNTER 16-BIT PRESC 16-BIT REGISTERS COUNTER 16-BIT PRESC TB MRCC_PCLKEN(5) MRCC_PCLKEN(4) MRCC_PCLKEN(3) MRCC_PCLKEN(2) MRCC_PCLKEN(1) CK_USB (48MHìz) /1,2,4,6,8,10,12,14 CK_ADC TCONV=30xTADC up to 10MHz 16-BIT INTEGER 6-BIT FRACTIONAL DIVIDER BAUD /16 RATE /(CPSDVR(1+SCR) - IN MASTER MODE: BIT RATE MAX = PCLK/2 CPSDVR=2,4,6,8,10,12,...,254 (even number) SCR=0,1,2,3,..,255 BIT RATE - IN SLAVE MODE: BIT RATE MAX = PCLK/12 FULL SPEED : 12Mbps REGISTERS UART1 16-BIT INTEGER 6-BIT FRACTIONAL DIVIDER BAUD /16 RATE REGISTERS UART0 16-BIT INTEGER 6-BIT FRACTIONAL DIVIDER BAUD /16 RATE REGISTERS REGISTERS SSP0 /(CPSDVR(1+SCR) - IN MASTER MODE: BIT RATE MAX = PCLK/2 CPSDVR=2,4,6,8,10,12,...,254 (even number) SCR=0,1,2,3,..,255 BIT RATE - IN SLAVE MODE: BIT RATE MAX = PCLK/12 REGISTERS I2C /2(CC)+7 REGISTERS BAUD RATE IN STD MODE /3(CC)+9 BAUD RATE IN FAST MODE UP TO 100kHz UP TO 400kHz CC=2,3,4,..,4095 CC=2,3,4,..,4095 CAN REGISTERS & CAN SRAM 4 BITS BAUD-RATE PRESCALER 6 BITS BIT BAUD RATE UP TO 1MBps QUANTUM WATCHDOG REGISTERS 16-BIT COUNTER 8-BIT PRESC RESET PCLK RTC REGISTERS 32-BIT COUNTER 20-BIT PRESC DATE ALARM CK_RTC CK_RTC 7-BIT REGISTERS PRESC SMI_CK UP TO 48MHz CK_RTC MUST BE AT LEAST 4X TIMES SLOWER THAN PCLK AHB PRESC /(1,2,4,8) APB PRESC /(1,2,4,8) (UP TO 64MHz) PCLK (UP TO 32MHz) /2 GP-DMA HCLK CK_TIM (UP TO 64MHz) PCLK PCLK CK_TIM PCLK CK_TIM PCLK CK_TIM PCLK CK_TIM PCLK CK_TIM PCLK PCLK PCLK PCLK PCLK PCLK PCLK PCLK PCLK PCLK PCLK PCLK |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
