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AN3422 Datasheet(PDF) 33 Page - STMicroelectronics |
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AN3422 Datasheet(HTML) 33 Page - STMicroelectronics |
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33 / 52 page ![]() AN3422 Peripheral migration Doc ID 018976 Rev 2 33/52 4.10 ADC The table below presents the differences between the ADC interface of STM32F1 series and STM32L1 series, these differences are the following: ● New digital interface ● New architecture and new features Program mode Half word Program memory: word/ half page DATA EEPROM memory: byte / half word / word / Double word Read Protection Unprotection Read protection disable RDP = 0xA55A Level 0 no protection RDP = 0xAA Protection Read protection enable RDP != 0xA55A Level 1 memory protection RDP != (Level 2 & Level 0) JTAG fuse NA Level 2 RDP = 0xCC (2) Write protection granularity Protection by 4 Kbyte block Protection by sector User Option bytes STOP STOP STANDBY STANDBY WDG WDG NA BOR level NA BFB2 1. For more details refer to “EEPROM emulation in STM32F10x microcontrollers (AN2594) 2. Memory read protection Level 2 is an irreversible operation. When Level 2 is activated, the level of protection cannot be decreased to Level 0 or Level 1. Table 12. FLASH differences between STM32F1 series and STM32L1 series (continued) Feature STM32F1 series STM32L1 series Color key: = New feature or new architecture = Same feature, but specification change or enhancement = Feature not available (NA) Table 13. ADC differences between STM32F1 series and STM32L1 series ADC STM32F1 series STM32L1 series ADC Type SAR structure SAR structure Instances ADC1 / ADC2 / ADC3 ADC1 Max Sampling freq 1 MSPS 1 MSPS |
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