| Electronic Components Datasheet Search |
|
DP83867CS Datasheet(PDF) 17 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DP83867CS Datasheet(HTML) 17 Page - Texas Instruments |
|
17 / 114 page ![]() DP83867CS, DP83867IS, DP83867E www.ti.com SNLS504 – OCTOBER 2015 9 Detailed Description 9.1 Overview The DP83867 is a fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE- Te, 100BASE-TX and 1000BASE-T Ethernet protocols. The DP83867 is designed for easy implementation of 10/100/1000 Mbps Ethernet LANs. It interfaces directly to twisted pair media via an external transformer. This device interfaces directly to the MAC layer through the Reduced GMII (RGMII) or embedded clock Serial GMII (SGMII). The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. It has deterministic, low latency and provides IEEE 1588 Start of Frame Detection. The DP83867 offers innovative diagnostic features including dynamic link quality monitoring for fault prediction during normal operation. It can support up to 130m cable length. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 17 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |