AT90LS4433-4AI datasheet(62/126 Pages) ATMEL

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AT90S/LS4433

1042H–AVR–04/03

Analog Comparator

The Analog Comparator compares the input values on the positive input PD6 (AIN0)

and negative input PD7 (AIN1). When the voltage on the positive input PD6 (AIN0) is

higher than the voltage on the negative input PD7 (AIN1), the Analog Comparator Out-

put, ACO, is set (one). The comparator’s output can be set to trigger the Timer/Counter1

Input Capture function. In addition, the comparator can trigger a separate interrupt,

exclusive to the Analog Comparator. The user can select interrupt triggering on compar-

ator output rise, fall or toggle. A block diagram of the comparator and its surrounding

logic is shown in Figure 43.

Figure 43. Analog Comparator Block Diagram

Analog Comparator Control

and Status Register – ACSR

• Bit 7 – ACD: Analog Comparator Disable

When this bit is set (one), the power to the Analog Comparator is switched off. This bit

can be set at any time to turn off the Analog Comparator. When changing the ACD bit,

the Analog Comparator interrupt must be disabled by clearing the ACIE bit in ACSR.

Otherwise, an interrupt can occur when the bit is changed.

• Bit 6 – AINBG: Analog Comparator Bandgap Select

When this bit is set, BOD is enabled and the BODEN is programmed, a fixed bandgap

voltage of 1.22V ± 0.1V replaces the normal input to the positive input (AIN0) of the

comparator. When this bit is cleared, the normal input pin, PD6, is applied to the positive

input of the comparator.

• Bit 5 – ACO: Analog Comparator Output

ACO is directly connected to the comparator output.

Bit

7654

321

$08 ($28)

ACD

AINBG

ACO

ACI

ACIE

ACIC

ACIS1

ACIS0

ACSR

Read/Write

R/W

Initial Value

N/A

AT90LS4433-4AI Datasheet(PDF) 62 Page - ATMEL Corporation

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