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PI4IOE5V9673LE Datasheet(PDF) 8 Page - Pericom Semiconductor Corporation

Part # PI4IOE5V9673LE
Description  reset Description
PDF  14 Pages
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI4IOE5V9673LE Datasheet(HTML) 8 Page - Pericom Semiconductor Corporation

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2016-01-0022
PT0553-4
02/15/16
8
PI4IOE5V9673
Preliminary Datasheet
16-bit I
2C-bus and SMBus I/O port with interrupt and reset
Software Reset call
• General Call address: allows to reset the PI4IOE5V9673 through the I2C-bus upon reception of the right C-bus sequence.
b7(MSB)
b6
b5
b4
b3
b2
b1
b0
General Call
Address
0
1
0
0
1
0
0
R/W
Software Reset
The Software Reset Call allows all the devices in the I
2C-bus to be reset to the power-up state value through a specific
formatted I
2C-bus command. To be performed correctly, it implies that the I2C-bus is functional and that there is no device
hanging the bus.
The Software Reset sequence is defined as following:
1. A START command is sent by the I
2C-bus master.
2. The reserved General Call I
2C-bus address ‘0000 000’ with the R/W bit set to 0 (write) is sent by the I2C-bus master.
3. The device acknowledges after seeing the General Call address ‘0000 0000’ (00h) only. If the R/W bit is set to 1 (read), no
acknowledge is returned to the I
2C-bus master.
4. Once the General Call address has been sent and acknowledged, the master sends 1 byte. The value of the byte must be
equal to 06h.
a. The device acknowledges this value only. If the byte is not equal to 06h, the device does not acknowledge it.
b. If more than 1 byte of data is sent, the device does not acknowledge any more.
5. Once the right byte has been sent and correctly acknowledged, the master sends a STOP command to end the Software
Reset sequence: the device then resets to the default value (power-up value) and is ready to be addressed again within the specified
bus free time. If the master sends a Repeated START instead, no reset is performed.
The I2C-bus master must interpret a non-acknowledge from the device (at any time) as a ‘Software Reset Abort’. The device
does not initiate a reset of its registers.
The unique sequence that initiates a Software Reset is described in Figure 5.
Figure 5 : Software Reset sequence



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