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2016-01-0022

PT0553-4

02/15/16

11

PI4IOE5V9673

Preliminary Datasheet

16-bit I

Figure 10. Application of multiple P4IOE5V9673s with interrupt

RESET input

A reset can be accomplished by holding the RESET pin LOW for a minimum of tw(rst). The PI4IOE5V9673 registers and

I2C-bus state machine will be held in their default state until the RESET input is once again HIGH. The I2C-bus is for 2-way, 2-

line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL).

Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data

transfer may be initiated only when the bus is not busy.

Bidirectional I/O expander applications

In the 8-bit I/O expander application shown in Figure 11, P00 and P01 are inputs, and P02 to P07 are outputs. When used in

this configuration, during a write, the input (P00 and P01) must be written as HIGH so the external devices fully control the input

ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P02 to P07). During a read, the logic

levels of the external devices driving the input ports (P00 and P01) and the previous written logic level to the output ports (P02 to

P07) will be read. The GPIO also has an interrupt line (INT) that can be connected to the interrupt logic of the microprocessor. By

sending an interrupt signal on this line, the remote I/O informs the microprocessor that there is incoming data or a change of data

on its ports without having to communicate via the I2C-bus.

Figure 11. Bidirectional I/O expander application