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2016-06-0008

PT0555-3

08/04/16

7

PI4IOE5V9675

Preliminary Datasheet

16-bit I

Details Description

a.

Device address

Following a START condition, the bus master must send the address of the slave it is accessing and the

operation it wants to perform (read or write). The address of the PI4IOE5V9675 is shown in bellow. Slave

address pins AD2, AD1, and AD0 choose 1 of 64 slave addresses. To conserve power, no internal pull-up

resistors are incorporated on AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can

be found in Table “PI4IOE5V9675 address map”.

Remark: The General Call address (0000 0000b) and the Device ID address (1111 100Xb) are reserved

and cannot be used as device address. Failure to follow this requirement will cause the PI4IOE5V9675 not to

acknowledge.

Remark: Reserved I

• slave devices that use the 10-bit addressing scheme (1111 0xx)

• High speed mode (Hs-mode) master code (0000 1xx)

PI4IOE5V9675 address

b7(MSB)

b6

b5

b4

b3

b2

b1

b0

Address Byte

A6

A5

A4

A3

A2

A1

A0

R/W

The last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected,

while a logic 0 selects a write operation.