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PI4IOE5V9675LE Datasheet(PDF) 11 Page - Pericom Semiconductor Corporation |
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PI4IOE5V9675LE Datasheet(HTML) 11 Page - Pericom Semiconductor Corporation |
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11 / 16 page ![]() |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||| 2016-06-0008 PT0555-3 08/04/16 11 PI4IOE5V9675 Preliminary Datasheet 16-bit I 2C-bus and SMBus I/O port with interrupt Quasi-bidirectional I/O architecture The PI4IOE5V9675’s 16 ports (see Figure 6) are entirely independent and can be used either as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode. Output data is transmitted to the ports in the Write mode. Every data transmission from the PI4IOE5V9675 must consist of an even number of bytes, the first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third will be referred to as P07 to P00, and so on. This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data directions. At power- on the I/Os are HIGH. In this mode only a current source (IOH) to VCC is active. An additional strong pull-up to VCC (Itrt(pu)) allows fast rising edges into heavily loaded outputs. These devices turn on when an output is written HIGH, and are switched off by the negative edge of SCL. The I/Os should be HIGH before being used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the write mode. Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large current (IOL) will flow to GND. Figure 6.Simplified schematic diagram of P00 to P17 Writing to the port (Output mode) To write, the master (microcontroller) first addresses the slave device. By setting the last bit of the byte containing the slave address to logic 0 the Write mode is entered. The PI4IOE5V9675 acknowledges and the master sends the first data byte for P07 to P00. After the first data byte is acknowledged by the PI4IOE5V9675, the second data byte P17 to P10 is sent by the master. Once again, the PI4IOE5V9675 acknowledges the receipt of the data. Each 8-bit data is presented on the port lines after it has been acknowledged by the PI4IOE5V9675. The number of data bytes that can be sent successively is not limited. After every two bytes, the previous data is overwritten. The first data byte in every pair refers to Port 0 (P07 to P00), whereas the second data byte in every pair refers to Port 1 (P17 to P10). Figure 7. Correlation between bits and ports |
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