TMS320F241FN datasheet(81/122 Pages) TI1

81 / 122 page

TMS320F243, TMS320F241

DSP CONTROLLERS

SPRS064D − DECEMBER 1997 − REVISED FEBRUARY 2006

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

low-power mode timings

switching characteristics over recommended operating conditions [H = 0.5tc(CO)]

(see Figure 22 and Figure 23)

PARAMETER

LOW-POWER MODES

MIN

TYP

MAX

UNIT

td(WAKE-A)

Delay time, CLKOUT switching to

IDLE1/IDLE2

LPM0

4 + 6 tc(CO)

tc(CO)

td(WAKE-A)

Delay time, CLKOUT switching to

program execution resume

IDLE1/IDLE2

LPM0

LPM1

4 + 6 tc(CO)

× tc(CO)

td(IDLE-COH)

Delay

time,

Idle

instruction

executed to CLKOUT high

4tc(CO)

td(WAKE-OSC)

Delay time, wakeup interrupt

asserted to oscillator running

HALT

{PLL/OSC power down}

LPM2

OSC start-up

and PLL lock

time

td(IDLE-OSC)

Delay

time,

Idle

instruction

executed to oscillator power off

{PLL/OSC power down}

LPM2

4tc(CO)

µs

td(EX)

Delay time, reset vector executed

after RS high

36H

WAKE INT

CLKOUT

A0−A15

td(WAKE−A)

Figure 22. Entry and Exit Timing − LPM0 and LPM1

td(EX)

td(IDLE−COH)

td(IDLE−OSC)

RESET

CLKOUT

A0−A15

td(WAKE−OSC)

Figure 23. HALT Mode − LPM2

NOTE: WAKE INT can be any valid interrupt or RESET

TMS320F241FN Datasheet(PDF) 81 Page - Texas Instruments

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