LIS2HH12 datasheet(36/47 Pages) STMICROELECTRONICS

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LIS2HH12

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DocID025344 Rev 5

8.10

CTRL6 (25h)

Control register 6 (r/w)

Table 35. Control register 6

8.11

CTRL7 (26h)

Control Register 7 (r/w)

Table 37. Control register 7

BOOT

0(1)

1. This bit must be set to ‘0’ for the correct operation of the device.

INT2

_BOOT

INT2

_IG2

INT2

_IG1

INT2

_EMPTY

INT2

_FTH

INT2

_DRDY

Table 36. Control register 6 description

BOOT

Force reboot, cleared as soon as the reboot is finished. Active high.

Default value 0.

INT2_BOOT

BOOT interrupt on INT2. Default value: 0

(0: disable; 1: enable)

INT2_IG2

Interrupt generator 2 on INT2. Default value: 0

(0: disable; 1: enable)

INT2_IG1

Interrupt generator 1 on INT2. Default value: 0

(0: disable; 1: enable)

INT2_EMPTY

FIFO empty flag on INT2. Default value: 0

INT2_FTH

FIFO threshold signal on INT2. Default value: 0

INT2_DRDY

Data Ready signal on INT2. Default value: 0

0(1)

1. This bit must be set to ‘0’ for the correct operation of the device.

0(1)

DCRM2

DCRM1

LIR2

LIR1

4D_IG2

4D_IG1

Table 38. Control register 7 description

DCRM [2:1]

DCRM is used to select the reset mode of the duration counter. Default value: 0

If DCRM = ‘0’, the counter is reset when the interrupt is no longer active, else if

DCRM = ‘1’ the duration counter is decremented. 1LSB

LIR [2:1]

Latched Interrupt [2:1] Default value: 00

(0: interrupt request not latched; 1: interrupt request latched)

Cleared by reading the IG_SRC1 (31h) and IG_SRC2 (37h) registers.

4D_IG [2:1]

Interrupt [2:1] 4D option enabled. Default value: 00

When set, IG_CFG1 (30h) and IG_CFG2 (36h) use 4D for position recognition.

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