TMS320VC5421 datasheet(62/104 Pages) TI1

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Electrical Specifications

December 1999 − Revised October 2008

SPRS098D

5.3

Electrical Characteristics

Table 5−2 describes the electrical characteristics over recommended operating case temperature range

(unless otherwise noted).

Table 5−2. Electrical Characteristics

PARAMETER

TEST CONDITIONS†

MIN

TYP‡

MAX

UNIT

VOH

High-level output voltage§

DVDD = 3.3 ± 0.3 V, IOH = MAX

2.4

VOL

Low-level output voltage§

IOL = MAX

0.4

IIZ

Input current in high impedance

DVDD = MAX, VI = VSS to DVDD

−10

IIZ

Input current in high impedance

DVDD = MAX, VI = VSS to DVDD

−10

µA

TRST

With internal pulldown

−10

Input current

See pin descriptions

With internal pullups

−35

Input current

(VI = VSS to DVDD)

PPD[15:0]

Bus holders enabled, DVDD = MAXk

−200

200

µA

(VI = VSS to DVDD)

All other input-only pins

−10

IDDC

Supply current, both core CPUs

CVDD = 1.8 V, fx = 100 MHz¶,

TC = 25°C

90#

IDDP

Supply current, pins

DVDD = 3.3 V, fclock = 100 MHz#,

TC = 25°C||

IDDA

Supply current, PLL

IDDC

Supply current, standby

IDLE2

PLL

× n mode, 20 MHz input

IDDC

Supply current, standby

IDLE3

PLL x n mode, 20 MHz input

600

µA

Input capacitance

Output capacitance

† For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.

‡ All values are typical unless otherwise specified.

§ All input and output voltage levels except RS, INT0, INT1, NMI, CLKIN, BCLKX, BCLKR, HAS, HCS, HDS1, HDS2, and HPIRS are

LVTTL-compatible.

¶ Clock mode: PLL × 1 with external source

# This value is based on 50% usage of MAC and 50% usage of NOP instructions. Actual operating current varies with the program being executed.

|| This value was obtained using the following conditions: external memory writes at a rate of 20 million writes per second, CLKOFF = 0, full-duplex

operation of all six McBSPs at a rate of 10 million bits per second each, and 15-pF loads on all outputs. For more details on how this calculation

is performed, refer to the Calculation of TMS320LC54x Power Dissipation Application Report (literature number SPRA164).

kVIL(MIN) ≤ VI ≤ VIL(MAX) or VIH(MIN) ≤ VI ≤ VIH(MAX)

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

Ω

Where:

IOL

1.5 mA (all outputs)

IOH

300

µA (all outputs)

VLoad = 1.5 V

40 pF typical load circuit capacitance

Figure 5−1. 3.3-V Test Load Circuit

TMS320VC5421 Datasheet(PDF) 62 Page - Texas Instruments

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