L6718 datasheet(57/71 Pages) STMICROELECTRONICS

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L6718

Output voltage monitoring and protection

A typical design considers the intervention of the total current OC before the per-phase OC,

leaving the latter as an extreme-protection in case of hardware failure in the external

components. Total current OC depends on the IMON design and on the application TDC and

max. current supported. A typical design flow is the following:

–

Define the maximum total output current (IOC_TOT) according to system

requirements (IMAX, ITDC). Considering IMON design, IMAX must correspond to 1.24

V (for correct IMAX detection) so IOC_TOT results defined, as a consequence:

Equation 10

–

Design per-phase OC and RG resistor in order to have IINFOx = IOC_TH (35 μA)

when IOUT is over the OCP in a worst-case condition considering the ripple current

and the extra current related to the DVID transient IDVID. Usually it is 10% higher

than the IOC_TOT current:

Equation 11

where N is the number of phases and DCR the DC resistance of the inductors. RG

should be designed in worst-case conditions.

–

Design the total current OC and RIMON in order to have the IMON pin voltage at

1.24 V at the IMAX current specified by the design. It results:

Equation 12

where IMAX is max. current requested by the processor.

–

Adjust the defined values according to the bench-test of the application.

–CIMON in parallel to RIMON can be added with proper time constant to prevent false

OC tripping.

Note:

This is a typical design flow. Custom design and specifications may require different settings

and ratios between the per-phase OC threshold and the total OC threshold. Applications

with big ripple across inductors may be required to set per-phase OC to values different

than 110%: design flow should be modified accordingly.

9.2.2

Overcurrent and power states

When the controller receives a set PS command through the SVI interface or automatic

DPM is set, the L6718 changes the number of working phases. In particular, the maximum

number of phases which the L6718 may work in >PS1 is limited to 2 phases regardless of

the number N configured in PS0. The OC level is then scaled as the controller enters >PS0,

as per Table 19.

OC_TOT

MAX

OC_TOT

⋅

1.24

⁄

1.1

OC_TOT

⋅

() DCR

⋅

OCTH

--------------------------------------------------------------

IMON

1.24V

⋅

MAX

DCR

⋅

---------------------------------

MON

DCR

-------------

OUT

⋅

⎝⎠

⎛⎞

L6718 Datasheet(PDF) 57 Page - STMicroelectronics

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