Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

DFE252012C Datasheet(PDF) 10 Page - MagnaChip Semiconductor.

Part # DFE252012C
Description  Dual Output LCD Bias IC
PDF  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MGCHIP [MagnaChip Semiconductor.]
Direct Link  http://www.magnachip.co.kr
Logo MGCHIP - MagnaChip Semiconductor.

DFE252012C Datasheet(HTML) 10 Page - MagnaChip Semiconductor.

Back Button DFE252012C Datasheet HTML 6Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 7Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 8Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 9Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 10Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 11Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 12Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 13Page - MagnaChip Semiconductor. DFE252012C Datasheet HTML 14Page - MagnaChip Semiconductor. Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 17 page
background image
Confidential
Datasheet Version 1.1
Mar. 2015. Revision 1.1
MagnaChip Semiconductor Ltd.
10
Applications
Under-voltage Lockout
If the input voltage falls below the VUVLO level of 2.1V, all the DC/DC regulators of MAP7102 are disabled, and
all the rails will restart with soft-start when input voltage is applied again
ENP/ENN
The ENP pin controls the output of VPOS and the ENN pin controls the output of VNEG. A high on either ENP
or ENN will enable the boost converter VREG. VPOS, VNEG and VREG require both their respective EN pin high
for each to be enabled
Power On / Off Sequence
The VREG boost regulator is activated when the input voltage is higher than the UVLO threshold, and either ENP
or ENN are high. The VPOS output is activated if ENP is high and VREG has completed its soft-start. The VNEG
output is activated if ENN is high and VREG has completed its soft-start.
ENP or ENN being pulled low shuts down VPOS or VNEG, respectively. If both ENP and ENN are pulled low,
VPOS, VNEG and VREG are all turned off
The discharge resistors of the VPOS and VNEG output are 70
Ω and 20Ω respectively.
VIN
ENP
ENN
VREG
VREG power good
VPOS
VNEG
UVLO
0.7ms
0.7ms
0.7ms
VIN
ENP
ENN
VREG
VREG power good
VPOS
VNEG
UVLO
0.7ms
0.7ms
0.7ms
Figure 18: Example of power on sequence when ENN
Figure 19: Example of power on sequence when both ENP
rising after VPOS soft-start finished
and ENN rising before VREG soft-start finished



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com