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PALCE29MA16 Datasheet(PDF) 17 Page - Advanced Micro Devices

Part # PALCE29MA16
Description  24-Pin EE CMOS Programmable Array Logic
PDF  25 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

PALCE29MA16 Datasheet(HTML) 17 Page - Advanced Micro Devices

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AMD
2-365
PALCE29MA16H-25 (Com’l)
SWITCHING CHARACTERISTICS
Latched Operation
Parameter
Symbol
Parameter Description
Min
Max
Unit
Combinatorial Output
tPD
Input or I/O Pin to Combinatorial Output
25
ns
tPTD
Input or I/O Pin to Output via Transparent Latch
28
ns
Output Latch – Pin LE
tSOL
Input or I/O Pin to Output Register Setup
15
ns
tGOL
Latch Enable to Transparent Mode Output
15
ns
tHOL
Data Hold Time for Output Latch
0
ns
tSTL
Input or I/O Pin to Output Latch Setup via
18
ns
Transparent Input Latch
Output Latch – Product Term LE
tSOLP
Input or I/O Pin to Output Latch Setup
4
ns
tGOLP
Latch Enable to Transparent Mode Output
29
ns
tHOLP
Data Hold Time for Output Latch
10
ns
tSTLP
Input or I/O Pin to Output Latch Setup via
10
ns
Transparent Input Latch
Input Latch – Pin LE
tSIL
I/O Pin to Input Latch Setup
2
ns
tGIL
Latch Feedback, Latch Enable Transparent Mode to
28
ns
Combinatorial Output
tHIL
Data Hold Time for Input Latch
6
ns
Latch Enable
tGIS
Latch Feedback (Pin Driven) to Output Register/Latch
20
ns
(Pin Driven) Setup
tGISPP
Latch Feedback (PT Driven) to Output Register/Latch
25
ns
(PT Driven) Setup
tGWH
Pin Enable Width HIGH
8
ns
tGWL
Pin Enable Width LOW
8
ns
tGWHP
PT Enable Width HIGH
12
ns
tGWLP
PT Enable Width LOW
12
ns



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